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000016_icon-group-sender _Mon Jul 10 08:03:12 2000.msg
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2001-01-03
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Return-Path: <icon-group-sender>
Received: (from root@localhost)
by baskerville.CS.Arizona.EDU (8.9.1a/8.9.1) id IAA20479
for icon-group-addresses; Mon, 10 Jul 2000 08:02:58 -0700 (MST)
Message-Id: <200007101502.IAA20479@baskerville.CS.Arizona.EDU>
Date: Mon, 10 Jul 2000 16:57:02 +1200 (NZST)
From: "Richard A. O'Keefe" <ok@atlas.otago.ac.nz>
To: gep2@terabites.com, icon-group@optima.CS.Arizona.EDU
Subject: Re: Error messages
Errors-To: icon-group-errors@optima.CS.Arizona.EDU
Status: RO
Content-Length: 941
> And then there is another matter: The instructions must be provided to the
processor (Pentium) in the optimal sequence, making sure the pipelines are full
at all times (as far as possible).
That was more of an issue in the days when there was one overwhelmingly dominant
microprocessor out there.
But there is a role for processor-model-specific scheduling.
This is where an assembler-source to assembler-source front end in a
compact high level form, relatively easy to plug new model-specific
information into, could really pay off. It's not really practical for
someone to write 10 different highly-tuned versions of a piece of
assembly code, but it _might_ be practical for them to write one clean
generic piece and let the front end adapt it. It would even be practical,
in such a system, to plug in advice that is specific to the file being
assembled. Just think of the variation there is in graphics support opcodes.